ETS-8000A General Digitized Training System

 • Basic logic gates experiments

  (a)  OR gate            
  (b)  NOT gate     
  (c)  OR + NOT gate      
  (d)  NOR gate      
  (e)  NAND gate                    
  (f )  4-inputs NAND gate
  (g)  AND-NOR                  
  (h)  Staircase lamp
 

• Assembled logic circuits experiments

  (a)  X+0=X, X+1=1      
  (b)  X．0=0, X．1=X
  (c)  X+X=X, X+X'=1    
  (d)  X．X=X, X．X'=0
  (e)  (X．Y)'=X'+Y'        
  (f )  (X+Y)'=X’．Y'
  (g)  2-bits comparator  
  (h)  Voting circuit
  (i )  Karnaugh map application
 

• Adder / subtractor experiments

  (a)  Half adder              
  (b)  Full adder          
  (c)  Half subtractor      
  (d)  Full subtractor      
  (e)  4-bits adder          
  (f )  4-bits subtractor   
  (g)  BCD code adder

 
• Decoder / encoder experiments

  (a)  8 to 3 encoder
  (b)  3 to 8 decoder
 

• Multiplexer experiments

  (a)  Multiplexer
  (b)  Logic unit.
 

• Basic Flip-Flop experiments

  (a)  Constructing a R-S Flip-Flop with NAND gates
  (b)  Constructing a R-S Flip-Flop with NOR gates
  (c)  J-K Flip-Flop
  (d)  T Flip-Flop
  (e)  D Flip-Flop
 

• Application of Flip-Flop experiments

  (a)  Constructing a D Flip-Flop with a J-K Flip-Flop;
  (b)  Constructing a T Flip-Flop with a J-K Flip-Flop;
  (c)  Mod-8 of ripple counter
 

• Counter experiments

  (a)  Mod-8 counter
  (b)  Mod-4 arbitrarily sequence
 

• Application of digital logic

  (a)  0~9 electric roulette
  (b)  Traffic sign control